FIG. 18 is a plan view illustrating an instance of a high-isolation microwave semiconductor integrated circuit (high-isolation MIC) formed by technologies described in Japanese Non-examined Patent Publication No. 6-125208 which has been disclosed by the inventor of the present invention. The microwave semiconductor integrated circuit features an embedded line structure with a transmission line embedded in a substrate. FIG. 19 is a cross-sectional view taken along a line 19--19 of FIG. 18. In the figures, reference numeral 10 designates a semiconductor substrate made of GaAs or InP, numeral 10a designates a slot formed at a region in which a transmission line 17 is to be formed on a surface of the semiconductor substrate 10. In the slot 10a, a conductor plate 7 is disposed to overlie the side and bottom surfaces of the slot 10a so that the conductor plate is U-shaped in cross-section. A dielectric 9 is disposed on the bottom area of the conductor plate 7, and a microstrip line 8 is disposed on the dielectric 9.
Thus, the transmission line 17 in a slot 10a of the semiconductor substrate 10 comprises the conductor plate 7, the microstrip line 8, and the dielectric 9 which is sandwiched between the conductor plate 7 and the microstrip line 8.
Reference numeral 1 designates an input terminal pad formed at one end of an input-side microstrip line 8a, numeral 2 designates an output terminal pad formed at one end of an output-side microstrip line 8b, numeral 3 designates a FET fabricated on a surface of the semiconductor substrate 10, numeral 4 designates a gate connecting electrode of the FET 3 that is connected to the other end of the input-side microstrip line 8a connected to the input terminal 1, numeral 5 designates a drain connecting electrode that is connected to the other end of the output-side microstrip line 8b connected to the output terminal 2, and numeral 6 designates a source connecting electrode of the FET 3. Since there is a difference in positional level between the semiconductor surface where the FET 3 is formed and the embedded microstrip line 8 in the slot 10a, the gate connecting electrode 4 and the drain connecting electrode 5 of the FET 3 are connected to the input-side microstrip line 8a and the output-side microstrip line 8b by gold wires 159, respectively.
Thus, the transmission line 17 formed in the slot 10a of the semiconductor substrate 10 has a structure such that the conductor plate 7 is disposed at both sides of the microstrip line 8, and this structure inhibits the leakage of electromagnetic waves in the lateral direction. Therefore, crosswalk hardly occurs even if a plurality of lines are arranged in proximity of each other, and the structure has high isolation.
In the prior art microwave semiconductor integrated circuit having the aforesaid structure, the transmission line is disposed in the slot on the substrate surface and the slot is covered with a conductor, and therefore the leakage of electromagnetic waves in the lateral direction is inhibited. However, it is difficult to connect the lines on the bottom surfaces of the slots of the substrate to the connecting electrodes of the element such as an FET formed on the surface of the substrate because of the difference in positional level between the lines and the electrodes. In addition, since the slots and other elements constituting a transmission line are formed on a single substrate where an element such as an FET has been formed, the existing element is damaged and the reliability of the circuit is deteriorated. Furthermore, when this embedded transmission line is formed on a surface of a semiconductor substrate where an element such as FET has been formed, there occurs a considerable unevenness on the surface of the substrate. Hence, different focuses are obtained during exposure to produce the masks necessary for etching slots and wiring layers, whereby it is difficult to fabricate the masks with high accuracy.